Amit Levy via Devel <devel@lists.tockos.org> writes:
Please respond if you are currently working on, or otherwise have an interest or stake in support for MMU-based platforms in Tock and paging support in particular.
I'd be interested in exploring the RISC-V side of this, for two reasons: - Given that at least one of the existing efforts [1] significantly touches the RISC-V arch crate---code that I have been maintaining in the past---I'd appreciate being kept in the loop. - I'm interested in MMU support for RISC-V more generally. My motivation comes from the fact that there are a number of RISC-V platforms with limited PMP implementations (due to its high impact on timing closures, e.g. [2]), but a full-featured and compliant MMU. MMU support go a long way for getting Tock working on these platforms in supervisor mode. That being said, I'm neither actively working on it, nor have any concrete project for which I'd be using this right now. Thanks! -Leon [1]: https://github.com/tock/tock/pull/4465 [2]: https://github.com/SpinalHDL/VexRiscv/pull/174